Responsible for pathfinding and advancing product architecture, the Solidigm NAND Development Team continues to develop the company’s floating gate technology. Led by J.D. Choi, the team works to further scale and accelerate the industry’s shift toward high‑density, high performance, and cost-efficient solutions for enterprise eSSD markets.
The product portfolio notably consists of Quad-level cell (QLC) and Triple-level cell (TLC) technology. Leaders more specifically explained that QLC technology is built on floating gate and anchors the high-capacity, read-intensive tier behind drives including the Solidigm™ D5-P5336. TLC technology serves the performance and mixed-workload tier, where drives such as the Solidigm™ D7-PS1010 carry higher endurance and write-throughput demands. They added that this portfolio mix better enables customers to match the media to the workload, rather than forcing one cell architecture across the entire data center.
Solidigm's Floating Gate architecture is particularly well positioned for AI inference, combining industry-leading read characteristics, scalable density, and predictable operation to support storage as a first-class component of AI systems.Brian Cleereman, Head of Process and Integration, NAND Development
J.D. Choi, Head of NAND Development, added that a deliberate Floating Gate NAND technology choice aligns tightly with the needs of AI infrastructure, particularly inference, KV cache, and large‑scale context storage.
Solidigm works to reinforce NAND’s role as a structural enabler of AI economics, not just a capacity add-on. This includes a more durable scaling path for high density, sustained cost‑per‑bit leadership, and economically viable AI infrastructure at hyperscale.J.D. Choi, Head of NAND Development
Learn more and explore Solidigm’s product portfolio, including a highly efficient, cost-effective solution for read-intensive workloads with capacities up to 122TB.